抄録
CC-002
TSV Placement for Large-size 3D-NoC by Evolutionary Algorithm
Yuting Huang(早大)・Xin Jiang(北九州高専)・Takahiro Watanabe(早大)
A Network-on-Chip (NoC), especially 3D-NoC is a promising solution to solve the communication problem in a large-scale integration. To implement 3D integration, TSV is the most popular technique. However, the number of TSVs is limited due to the manufacturing cost and chip yield. Therefore, the allocations of the definite number of TSVs affects the network performance.
We already proposed an optimal TSV placement method based on Evolutionary Algorithm (EA), and the experimental results showed that our proposed method was effective for small-size NoC.
In this paper, we evaluate the method for the larger mesh-type NoC up to 16*16 in size. Experimental results show that the proposed method can achieve lower latency and energy and higher throughput. In addition, we also discuss the execution time to get the optimum TSV distribution.