5K-5
On-Chip Router Architecture for Detecting Soft Errors
○五十嵐俊哉,笹河良介,吉瀬謙二(東工大)
As the silicon integration technology has grown, the soft error rate
has increased. If it occurs on the control of a On-Chip router for
Many-core processor, it will cause some issues such as Deadlock or
packet loss. Preventing these faults, we prepared additional hardware
for detecting soft errors in intra-router logic. The simple answer is
to use redundant router. But, it takes extra hardware. However, if
additional hardware was not enough, some errors are not detected. Here
we discuss how hardware should be added, and what error should be
detected.

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