FIT2015第14回情報科学技術フォーラム 開催日:2015年9月15日(火)~17日(木) 会場:愛媛大学城北キャンパス
FIT2015 船井業績賞受賞記念講演
Efficiency and Programmability: The Challenges of Future Computing
William J Dally
Professor (Research) of EE and CS, Stanford University
Chief Scientist and Senior Vice President of Research, NVIDIA Corporation

9月16日(水) 14:00-15:15
【講演概要】 The computing demands of mobile devices, data centers, and HPC are increasing exponentially. At the same time, the end of Dennard scaling has slowed the rate of improvement and made all computing power limited. With improvements in semiconductor process technology offering little increase in efficiency, innovations in architecture and circuits are required to maintain the expected performance scaling. Specialized hardware gives excellent efficiency but at the expense of generality and programmability.
To compensate for slower scaling, emerging computer systems have heterogenous processors, deep memory hierarchies, and large-scale parallelism - making them challenging to program. Target-independent programming has the potential to greatly simplify the programming of these machines. The programmer expresses all of the parallelism and abstract representations of locality. Mapping tools adapt the program to the characteristics of a particular target machine.
This talk will discuss these challenges of efficiency and programmability in more detail and introduce some of the technologies being developed to address them.

【略歴】 Bill is Chief Scientist and Senior Vice President of Research at NVIDIA Corporation and a Professor (Research) and former chair of Computer Science at Stanford University. Bill and his group have developed system architecture, network architecture, signaling, routing, and synchronization technology that can be found in most large parallel computers today. While at Bell Labs Bill contributed to the BELLMAC32 microprocessor and designed the MARS hardware accelerator. At Caltech he designed the MOSSIM Simulation Engine and the Torus Routing Chip which pioneered wormhole routing and virtual-channel flow control. At the Massachusetts Institute of Technology his group built the J-Machine and the M-Machine, experimental parallel computer systems that pioneered the separation of mechanisms from programming models and demonstrated very low overhead synchronization and communication mechanisms. At Stanford University his group has developed the Imagine processor, which introduced the concepts of stream processing and partitioned register organizations, the Merrimac supercomputer, which led to GPU computing, and the ELM low-power processor. Bill is a Member of the National Academy of Engineering, a Fellow of the IEEE, a Fellow of the ACM, and a Fellow of the American Academy of Arts and Sciences. He has received the ACM Eckert-Mauchly Award, the IEEE Seymour Cray Award, and the ACM Maurice Wilkes award. He currently leads projects on computer architecture, network architecture, circuit design, and programming systems. He has published over 200 papers in these areas, holds over 100 issued patents, and is an author of the textbooks, Digital Design: A Systems Approach, Digital Systems Engineering, and Principles and Practices of Interconnection Networks.