抄録
RC-003
Dependable Techniques for Noise Block and Delay Variation Detection/Correction
三浦幸也・大川善大(首都大)
Dual edge triggered flip-flops have been proposed for noise aware design. As the clock signal has two edges, if an edge triggered flip-flop can sample data by using those two edges, the flip-flop has the highly ability to prevent sampling a noise signal on the data line. This paper shows new design of the dual edge triggered flip-flops improved a circuit size and performance. In addition, a method for signal delay variation detection and correction utilized the proposed flip-flop is proposed. We show effectiveness of proposed design and application to delay variation detection/correction.