1H-3
Speeding processor up by employing instruction register
○Asri Mochamad，松村貴之，吉瀬謙二（東工大）
Optimizing I-Fetch logic is a natural target for processor. Instruction register was proposed to improved I-Fetch mechanism (Hines et all, 2005)

In this paper, we try to improve the existing proposed method further out to aim more efficient I-Fecth mechanism that leads to processor's speed up